Renesas Electronics /R7FA6M4AF /OSPI /DCSTR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as DCSTR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (000)DVSELCMD 0 (000)DVSELHI 0 (00)DVSELLO

DVSELLO=00, DVSELHI=000, DVSELCMD=000

Description

Device Chip Select Timing Setting Register

Fields

DVSELCMD

Device Command execution interval setting

0 (000): 2 clock cycles

1 (001): 5 clock cycles

2 (010): 7 clock cycles

3 (011): 9 clock cycles

4 (100): 11 clock cycles

5 (101): 13 clock cycles

6 (110): 15 clock cycles

7 (111): 17 clock cycles

DVSELHI

Device select signal pull-up timing setting

0 (000): Setting prohibited

1 (001): Setting prohibited

2 (010): Setting prohibited

3 (011): Setting prohibited (DOPI mode) 5 clock cycles (Other mode)

4 (100): Setting prohibited (DOPI mode) 6 clock cycles (Other mode)

5 (101): 6.5 clock cycles (DOPI mode) 7 clock cycles (Other mode)

6 (110): 7.5 clock cycles (DOPI mode) 8 clock cycles (Other mode)

7 (111): 8.5 clock cycles (DOPI mode) 9 clock cycles (Other mode)

DVSELLO

Device select signal pull-down timing setting

0 (00): Setting prohibit

1 (01): 2.5 clock cycles (DOPI mode) 3 clock cycles (Other mode)

2 (10): 3.5 clock cycles (DOPI mode) 4 clock cycles (Other mode)

3 (11): 4.5 clock cycles (DOPI mode) 5 clock cycles (Other mode)

Links

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